1. Field of the Invention
The present invention relates to a high-frequency power amplifier provided with a harmonic processing circuit to suppress harmonics included in output voltages of amplification transistors, and more particularly, to a high-frequency power amplifier capable of producing effects of the harmonic processing circuit on the respective amplification transistors more uniformly.
2. Background Art
There is a proposal of a high-frequency power amplifier operating with a high-frequency band of several tens of MHz or more provided with a harmonic processing circuit to suppress harmonics included in output voltages of amplification transistors to improve its distortion characteristic (e.g., see. Japanese Patent Laid-Open No. 2001-111362).
FIG. 6 is a diagram showing a layout pattern of a conventional high-frequency power amplifier. An input signal inputted to an input port Port1 is supplied to amplification transistors Q1 to Q10 through a transmission line TB. The amplification transistors Q1 to Q10 amplify the input signal respectively and output it to an output port Port2 through a transmission line TC. A harmonic processing circuit STUB is connected to a connection point between the amplification transistors Q1 to Q10 and the output port Port2. The harmonic processing circuit STUB is an open stub having a ¼ wavelength for a frequency, for example, double the input frequency and suppresses a double wave (harmonic) included in the output voltages of the amplification transistors Q1 to Q10.
FIG. 7 is an enlarged view of the encircled area of FIG. 6. The base of the amplification transistor Q7 and the transmission line TB are connected together, the collector and the transmission line TC are connected together and the emitter and GND are connected together through an air bridge AB.
FIG. 8 is a diagram showing an equivalent circuit of the conventional high-frequency power amplifier. The bases of the amplification transistors Q1 to Q10 are connected to the input port Port1 through the transmission lines TB1 to TB10. Furthermore, the collectors of the amplification transistors Q1 to Q5 are connected in series through the transmission lines TC1 to TC4 respectively and the collectors of the amplification transistors Q6 to Q10 are connected in series through the transmission lines TC6 to TC9.
The collector of the amplification transistor Q5 is connected to the output port Port2 through the transmission line TC5 and the collector of the amplification transistor Q10 is connected to the output port Port2 through the transmission line TC10. The harmonic processing circuit STUB is connected to the output port Port2. Therefore, the harmonic processing circuit STUB is connected to one end of the line of the collectors of the amplification transistors Q1 to Q5 and one end of the line of the collectors of the amplification transistors Q6 to Q10.
FIG. 9 is a diagram showing a time waveform of the collector current of the amplification transistor. When a large signal is inputted, it is clipped by a static characteristic of the amplification transistor and distortion occurs in the collector current. In this case, a fundamental and harmonics having frequencies double, triple and quadruple the frequency of the fundamental are included.
FIG. 10 is a diagram showing a time waveform of the output voltage of the amplification transistor. Suppose the same load as that of the fundamental is also connected to harmonics. When there is no harmonic processing circuit, the waveform of the output voltage is analogous to the waveform of the collector current. On the other hand, when a harmonic processing circuit is added, the harmonics included in the output voltage are suppressed, and therefore it is possible to obtain a large waveform for the fundamental.